Design and VLSI Implementation of Arithmetic Operation using Quaternary Signed Digit Number System

Authors:J. UMA MAHESHWAR, K. PADMAJA DEVI

0352-0357

Designing and Implementation of Secure Hash Algorithm-1(SH-1)

Authors:DASARI SHIVA KUMAR, L. SRINIVAS, P. V. N. SWAMY

0358-0362

Design of 2×2 DFT-spread STBC Coherent Optical-OFDM For PDM Optical Communications

Authors:HARSHAVARDHANA H. D, DR. M. N. SREERANGARAJU

0363-0366

Simulation and Implementation of Multi-Channel UART Controller Based on FIFO and FPGA

Authors:BOORTHULA KIRAN, MD. SHAZIA FATIMA, P. V. N. SWAMY

0367-0371

A Novel Approach for Low-Power and Area-Efficient Carry Select Adder

Authors:VENKANNA BABU, THOTAPALLI VINAY KUMAR, KOTA VENKATESWARA RAO

0372-0376

Design and Implementation of Programmable Arbiter Based on Chip Permutation Network for MPSOC

Authors:P. HARIKA, J. SRAVANA

0377-0381

High Speed and Area Optimized Realization of 5 Port Router

Authors:MALLESH KUMAR A, NARSAPPA REDDY, MIRZA SAJID ALI BAIG

0382-0386

Image Compression Techniques for Compensating Memory Errors in JPEG2000

Authors:K. VIJAYA LAXMI, THOTAPALLI VINAY KUMAR, KOTA VENKATESWARA RAO

0387-0391

A Viable Implementation of Security-Enabled Flexible Architecture with Symmetric Cryptography

Authors:DEEPA PATTANE, NARSAPPA REDDY, MIRZA SAJID ALI BAIG

0392-0396

Quaternary Signed Digit Number System Implementation for Fast Addition Based On VLSI

Authors:SK. CHAND PASHA, THOTAPALLI VINAY KUMAR, KOTA VENKATESWARA RAO

0397-0402